Course Objective & Scope
In LLM inference, pushing for higher throughput often degrades single-user latency; effective optimisation starts by diagnosing whether your workload is prefill-heavy (compute-bound) or decode-heavy (memory-bandwidth-bound). This course covers the roofline model, kernel-level accelerators (FlashAttention, FlashInfer, CUDA Graphs), speculative decoding techniques (draft models, EAGLE, n-gram) and choosing between tensor, pipeline and data parallelism.
Participants run benchmarks against realistic traffic profiles and find the configuration that delivers the highest tokens/s per GPU without breaching P95 TTFT and TPOT SLO targets.
Who Should Attend?
- Senior AI and platform engineers responsible for LLM serving performance
- ML engineers building real-time voice, chat and coding assistant infrastructure
- MLOps teams aiming to cut GPU cost while meeting strict SLA/SLO targets
- Prerequisite: hands-on vLLM/SGLang/TensorRT-LLM experience and basic GPU architecture knowledge
Key Takeaways
- Diagnose prefill and decode bottlenecks using the GPU roofline model
- Reduce decode latency with speculative decoding (EAGLE, Medusa, n-gram)
- Choose the optimal mix of tensor parallelism, pipeline parallelism and data replicas
- Cut CPU and kernel launch overhead with CUDA Graphs, torch.compile and attention backends
- Plot the throughput-latency Pareto frontier under P95 TTFT and TPOT SLO constraints
Curriculum
LLM Inference Metrics and the Roofline Model
- Defining TTFT, ITL/TPOT, E2E latency and goodput (SLO-compliant throughput)
- FLOP/s versus HBM memory bandwidth: arithmetic intensity analysis
Kernel and Runtime Acceleration
- FlashAttention-2/3, FlashInfer and fused MLP/norm kernels
- CUDA Graphs, async output processing and CPU scheduling bottlenecks
Speculative Decoding Techniques
- Draft-target models, EAGLE, Medusa and prompt lookup (n-gram) methods
- Acceptance rates and why speculative decoding trades off at high batch sizes
Parallelism Strategies and Multi-GPU Trade-Offs
- Communication overhead of tensor parallelism (TP) and NVLink versus PCIe impact
- When to run independent data-parallel replicas instead of increasing TP
SLO-Driven Benchmarking and Tuning Report
- Testing across QPS levels and prompt distributions with GenAI-Perf and
vllm bench serve - Maximising goodput and producing an organisation-specific tuning playbook
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